From 54409423f767d8b1cf30cb7d0efca6b4ca138823 Mon Sep 17 00:00:00 2001
From: Ethan Morgan <ethan@gweithio.com>
Date: Sat, 14 Feb 2026 16:44:06 +0000
Subject: move to own git server

---
 ...Fix-constexpr-error-with-vs2019-with-half.patch | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 vcpkg/ports/arrayfire/Fix-constexpr-error-with-vs2019-with-half.patch

(limited to 'vcpkg/ports/arrayfire/Fix-constexpr-error-with-vs2019-with-half.patch')

diff --git a/vcpkg/ports/arrayfire/Fix-constexpr-error-with-vs2019-with-half.patch b/vcpkg/ports/arrayfire/Fix-constexpr-error-with-vs2019-with-half.patch
new file mode 100644
index 0000000..7766c3e
--- /dev/null
+++ b/vcpkg/ports/arrayfire/Fix-constexpr-error-with-vs2019-with-half.patch
@@ -0,0 +1,22 @@
+diff --git a/src/backend/common/half.hpp b/src/backend/common/half.hpp
+index ce06eed..fb25d03 100644
+--- a/src/backend/common/half.hpp
++++ b/src/backend/common/half.hpp
+@@ -879,15 +879,9 @@ class alignas(2) half {
+         return *this;
+     }
+ 
+-#if defined(NVCC) || defined(__CUDACC_RTC__)
+-    AF_CONSTEXPR __DH__ explicit half(__half value) noexcept
+ #ifdef __CUDA_ARCH__
+-        : data_(value) {
+-    }
+-#else
+-        : data_(*reinterpret_cast<native_half_t*>(&value)) {
+-    }
+-#endif
++    AF_CONSTEXPR __DH__ explicit half(__half value) noexcept : data_(value) {}
++
+     AF_CONSTEXPR __DH__ half& operator=(__half value) noexcept {
+         // NOTE Assignment to ushort from __half only works with device code.
+         // using memcpy instead
-- 
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