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| author | Laytan <laytanlaats@hotmail.com> | 2024-09-01 15:51:39 +0200 |
|---|---|---|
| committer | Laytan <laytanlaats@hotmail.com> | 2024-09-01 21:42:47 +0200 |
| commit | 28c643d23f989937c8d530b49a2369e8cd9d39e2 (patch) | |
| tree | fc78a1d9dccc3184c759b54f8e269cc2397857e4 /src/threading.cpp | |
| parent | 722b638e2cbefcc1735256ef712cf2b28078a7fb (diff) | |
riscv compiler support
Diffstat (limited to 'src/threading.cpp')
| -rw-r--r-- | src/threading.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/threading.cpp b/src/threading.cpp index e30a20a06..af8fd803c 100644 --- a/src/threading.cpp +++ b/src/threading.cpp @@ -529,6 +529,9 @@ gb_internal gb_inline void yield_thread(void) { _mm_pause(); #elif defined(GB_CPU_ARM) __asm__ volatile ("yield" : : : "memory"); +#elif defined(GB_CPU_RISCV) + // I guess? + __asm__ volatile ("nop" : : : "memory"); #else #error Unknown architecture #endif |