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* core/crypto/sha2: Use hardware SHA224/256 when available (AMD64)Yawning Angel2025-03-231-1/+1
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* Fix documentation for simd_shuffleflysand72025-03-021-5/+3
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* Merge branch 'master' into docs-simdflysand72025-03-021-0/+78
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| * Added simd_extract_lsbs intrinsic as well.Barinzaya2025-02-241-0/+1
| | | | | | | | | | Equivalent to the simd_extract_msbs intrinsic, except it extracts the least significant bit of each element instead.
| * Added simd_extract_msbs intrinsic.Barinzaya2025-02-241-0/+2
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* | Merge branch 'simd-docs' into docs-simdflysand72025-01-211-86/+90
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| * | Suggestion fixesflysand72025-01-211-64/+75
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| * | Fix indentationflysand72024-12-011-6/+6
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| * | Fix indentationflysand72024-12-011-1/+1
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| * | First passflysand72024-12-011-36/+2190
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* | [simd] Fixes to inputs/result/example/output sections & grmamar fixesflysand72025-01-081-97/+110
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* | Apply suggestions from code reviewflysand72024-12-041-4/+4
| | | | | | Co-authored-by: Laytan <laytanlaats@hotmail.com>
* | Apply suggestions from code reviewflysand72024-12-041-105/+105
| | | | | | Co-authored-by: Laytan <laytanlaats@hotmail.com>
* | [core/simd]: Write package documentationflysand72024-12-021-36/+2190
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* Replace "." with "," in parameter listAntonino Simone Di Stefano2024-09-221-2/+2
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* Moved all packages in core, base, vendor, tests and examples to use new #+ ↵Karl Zylinski2024-09-1415-15/+15
| | | | file tag syntax.
* add riscv to simd.IS_EMULATEDLaytan Laats2024-08-221-0/+1
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* core/simd: Add `IS_EMULTATED` so there is one place to look for potatosYawning Angel2024-08-181-0/+7
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* Add `intrinsics.masked_expand_load` and `intrinsics.masked_compress_store`gingerBill2024-08-051-1/+2
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* Fix typosgingerBill2024-08-051-2/+2
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* Add `intrinsics.simd_masked_load` and `intrinsics.simd_masked_store`gingerBill2024-08-051-0/+3
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* Add `intrinsics.simd_gather` and ``intrinsics.simd_scatter`gingerBill2024-08-051-0/+5
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* `add_sat` -> `saturating_add`gingerBill2024-08-051-8/+8
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* Rename `add_sat` -> `saturating_add`gingerBill2024-08-051-2/+2
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* Add `simd_reduce_any` and `simd_reduce_all`gingerBill2024-08-051-0/+3
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* core/crypto/aes: Add Intel AES-NI supportYawning Angel2024-07-161-2/+2
| | | | | This supports AES-NI + PCLMUL, and provides optimized key schedule, ECB, CTR, and GCM. Other modes are trivial to add later if required.
* core/simd/x86: Make the AES-NI intrinsics consistent with IntelYawning Angel2024-07-161-6/+6
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* core/simd/x86: Fix some intrinsicsYawning Angel2024-07-161-14/+19
| | | | | - _mm_slli_si128 produced totally incorrect output - _mm_storeu_si128 refered to a LLVM intrinsic that is missing
* Let simd/x86 pass new transmute/cast vet.Jeroen van Rijn2024-07-093-21/+21
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* core/simd/x86: Add the AES-NI intrinsicsYawning Angel2024-06-011-0/+49
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* Correct `core:intrinsics` to `base:intrinsics`gingerBill2024-05-136-6/+6
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* compiler: improve target features supportLaytan Laats2024-05-022-4/+4
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* Replace `core:*` to `base:*` where appropriategingerBill2024-01-281-2/+2
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* core/simd/x86: Use the `none` calling convention for intrinsicsYawning Angel2024-01-0711-11/+11
| | | | | | | | The LLVM intrinsics that live under `llvm.x86` are not actual functions, so trying to invoke them as such using the platform's native C calling convention causes incorrect types to be emitted in the IR. Thanks to laytanl for assistance in testing.
* core/simd/x86: Correct a target feature nameYawning Angel2024-01-071-1/+1
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* Fix the other bit_* intrinsic callsjakubtomsu2023-10-222-7/+7
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* change and_not to bit_and_notjakubtomsu2023-10-221-1/+1
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* Rename simd bitwise operations from `intrinsics.simd_and` to ↵gingerBill2023-09-281-4/+4
| | | | `intrinsics.simd_bit_and` etc
* [sys/info] Initial version.Jeroen van Rijn2022-09-011-94/+0
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* Remove `simd_rem`; Disallow `simd_div` for integersgingerBill2022-06-021-2/+1
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* Add enable_target_feature to ABMgingerBill2022-05-301-4/+4
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* Add SSE4.2gingerBill2022-05-301-0/+149
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* Add `@(require_results)` to all appropriate proceduresgingerBill2022-05-3010-386/+398
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* Add SSE4.1gingerBill2022-05-301-0/+352
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* `@(require_target_feature=<string>)` `@(enable_target_feature=<string>)`gingerBill2022-05-307-0/+364
| | | | | require_target_feature - required by the target micro-architecture enable_target_feature - will be enabled for the specified procedure only
* Rename to `lanes_rotate_left`, `lanes_rotate_right`, `lanes_reverse`gingerBill2022-05-291-3/+3
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* Use single line attributesgingerBill2022-05-299-18/+9
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* Add sha.odingingerBill2022-05-291-0/+43
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* Add cmpxchg16bgingerBill2022-05-291-0/+8
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* Add pclmulqdq.odingingerBill2022-05-291-0/+13
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