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authorColin Davidson <colrdavidson@gmail.com>2025-07-28 15:10:42 -0700
committerColin Davidson <colrdavidson@gmail.com>2025-07-28 15:10:42 -0700
commit1848e0df05a14679d49e5b87988fa6c7b609739b (patch)
tree77df5918a4d42989a0a256cfeb8e16261ec0d5ef /core/time
parentb88f9194d0d25bd5121f45eb3696b0e1725dfd41 (diff)
use the correct frequency for the arm tsc timer
Diffstat (limited to 'core/time')
-rw-r--r--core/time/tsc_darwin.odin3
1 files changed, 2 insertions, 1 deletions
diff --git a/core/time/tsc_darwin.odin b/core/time/tsc_darwin.odin
index fdda5db77..55abf5868 100644
--- a/core/time/tsc_darwin.odin
+++ b/core/time/tsc_darwin.odin
@@ -1,13 +1,14 @@
#+private
package time
+import "base:intrinsics"
import "core:sys/unix"
_get_tsc_frequency :: proc "contextless" () -> (freq: u64, ok: bool) {
if ODIN_ARCH == .amd64 {
unix.sysctlbyname("machdep.tsc.frequency", &freq) or_return
} else if ODIN_ARCH == .arm64 {
- unix.sysctlbyname("hw.tbfrequency", &freq) or_return
+ freq = u64(intrinsics.arm64_read_cycle_counter_frequency())
} else {
return
}