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| author | gingerBill <gingerBill@users.noreply.github.com> | 2024-09-02 00:20:04 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-02 00:20:04 +0100 |
| commit | 16c5c69a4079652e930d897823446b7e7a65bd2f (patch) | |
| tree | 2543c3c65ca653bcc0ed13da59775d4b314d57e7 /src/gb | |
| parent | 39b49cb6fbf5f717bb0b01c6449d37f99ffd9b48 (diff) | |
| parent | 28c643d23f989937c8d530b49a2369e8cd9d39e2 (diff) | |
Merge pull request #4175 from laytan/riscv-compilerdev-2024-09
Support RISC-V for the compiler itself
Diffstat (limited to 'src/gb')
| -rw-r--r-- | src/gb/gb.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/src/gb/gb.h b/src/gb/gb.h index 38dabc9bd..0e65696e2 100644 --- a/src/gb/gb.h +++ b/src/gb/gb.h @@ -39,7 +39,7 @@ extern "C" { #endif #endif -#if defined(_WIN64) || defined(__x86_64__) || defined(_M_X64) || defined(__64BIT__) || defined(__powerpc64__) || defined(__ppc64__) || defined(__aarch64__) +#if defined(_WIN64) || defined(__x86_64__) || defined(_M_X64) || defined(__64BIT__) || defined(__powerpc64__) || defined(__ppc64__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) #ifndef GB_ARCH_64_BIT #define GB_ARCH_64_BIT 1 #endif @@ -144,6 +144,13 @@ extern "C" { #define GB_CACHE_LINE_SIZE 64 #endif +#elif defined(__riscv) + #ifndef GB_CPU_RISCV + #define GB_CPU_RISCV 1 + #endif + #ifndef GB_CACHE_LINE_SIZE + #define GB_CACHE_LINE_SIZE 64 + #endif #else #error Unknown CPU Type #endif @@ -2562,7 +2569,7 @@ gb_inline void *gb_memcopy(void *dest, void const *source, isize n) { void *dest_copy = dest; __asm__ __volatile__("rep movsb" : "+D"(dest_copy), "+S"(source), "+c"(n) : : "memory"); -#elif defined(GB_CPU_ARM) +#elif defined(GB_CPU_ARM) || defined(GB_CPU_RISCV) u8 *s = cast(u8 *)source; u8 *d = cast(u8 *)dest; for (isize i = 0; i < n; i++) { @@ -6267,6 +6274,12 @@ gb_no_inline isize gb_snprintf_va(char *text, isize max_len, char const *fmt, va asm volatile("mrs %0, cntvct_el0" : "=r"(virtual_timer_value)); return virtual_timer_value; } +#elif defined(__riscv) + gb_inline u64 gb_rdtsc(void) { + u64 result = 0; + __asm__ volatile("rdcycle %0" : "=r"(result)); + return result; + } #else #warning "gb_rdtsc not supported" gb_inline u64 gb_rdtsc(void) { return 0; } |