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* Add `@(require_results)` to `core:simd` procedures where missinggingerBill2025-11-221-0/+8
* Fix renamed function call in bit_notandzdroid2025-10-101-1/+1
* Further overhaul of package line comments.Jeroen van Rijn2025-10-091-1/+1
* More package lines.Jeroen van Rijn2025-10-091-1/+1
* Make `Operation:` comments unformattedgingerBill2025-10-091-54/+54
* rename table_lookup to runtime_swizzleJon Lipstate2025-07-161-3/+3
* table lookup intrinsicJon Lipstate2025-07-051-0/+51
* Rename `SIMD_IS_EMULATED` to capability-affirmative `HAS_HARDWARE_SIMD`Feoramund2025-05-291-4/+4
* Move `simd.IS_EMULATED` to `runtime.SIMD_IS_EMULATED`Feoramund2025-05-291-5/+2
* Added alternate reduce-add/reduce-mul intrinsics.Barinzaya2025-05-051-2/+192
* Add `simd.indices` and docsgingerBill2025-05-051-0/+14
* Fix broken examples in documentation tester.Jeroen van Rijn2025-04-051-55/+113
* Fix documentation for simd_shuffleflysand72025-03-021-5/+3
* Merge branch 'master' into docs-simdflysand72025-03-021-0/+78
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| * Added simd_extract_lsbs intrinsic as well.Barinzaya2025-02-241-0/+1
| * Added simd_extract_msbs intrinsic.Barinzaya2025-02-241-0/+2
* | Merge branch 'simd-docs' into docs-simdflysand72025-01-211-86/+90
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| * | Suggestion fixesflysand72025-01-211-64/+75
| * | Fix indentationflysand72024-12-011-6/+6
| * | Fix indentationflysand72024-12-011-1/+1
| * | First passflysand72024-12-011-36/+2190
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* | [simd] Fixes to inputs/result/example/output sections & grmamar fixesflysand72025-01-081-97/+110
* | Apply suggestions from code reviewflysand72024-12-041-4/+4
* | Apply suggestions from code reviewflysand72024-12-041-105/+105
* | [core/simd]: Write package documentationflysand72024-12-021-36/+2190
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* add riscv to simd.IS_EMULATEDLaytan Laats2024-08-221-0/+1
* core/simd: Add `IS_EMULTATED` so there is one place to look for potatosYawning Angel2024-08-181-0/+7
* Add `intrinsics.masked_expand_load` and `intrinsics.masked_compress_store`gingerBill2024-08-051-1/+2
* Fix typosgingerBill2024-08-051-2/+2
* Add `intrinsics.simd_masked_load` and `intrinsics.simd_masked_store`gingerBill2024-08-051-0/+3
* Add `intrinsics.simd_gather` and ``intrinsics.simd_scatter`gingerBill2024-08-051-0/+5
* Rename `add_sat` -> `saturating_add`gingerBill2024-08-051-2/+2
* Add `simd_reduce_any` and `simd_reduce_all`gingerBill2024-08-051-0/+3
* Replace `core:*` to `base:*` where appropriategingerBill2024-01-281-2/+2
* Rename simd bitwise operations from `intrinsics.simd_and` to `intrinsics.simd...gingerBill2023-09-281-4/+4
* Remove `simd_rem`; Disallow `simd_div` for integersgingerBill2022-06-021-2/+1
* Rename to `lanes_rotate_left`, `lanes_rotate_right`, `lanes_reverse`gingerBill2022-05-291-3/+3
* Add loads of aliases of vector typesgingerBill2022-05-271-18/+53
* Add prefix of `lanes_`gingerBill2022-05-261-2/+2
* Support reverse_bits for #simdgingerBill2022-05-261-1/+2
* Merge `intrinsics.simd_sqrt` with `intrinsics.sqrt`gingerBill2022-05-261-1/+1
* Add `intrinsics.fused_mul_add`gingerBill2022-05-261-0/+3
* Support `count_ones` etc with #simdgingerBill2022-05-261-5/+10
* Rename `simd_eq` etc to `simd_lanes_eq`gingerBill2022-05-261-6/+6
* Add arithmetic operator support for simd vectors; Add `intrinsics.simd_and_not`gingerBill2022-05-261-3/+13
* Remove need for `simd.splat`gingerBill2022-05-261-7/+2
* Keep -vet happygingerBill2022-05-261-1/+1
* `simd.bit_not`; `simd.copysign`gingerBill2022-05-261-1/+15
* Add `simd_clamp`gingerBill2022-05-261-3/+5
* Add `simd_rotate_left` simd_rotate_right`gingerBill2022-05-261-0/+3
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