| Commit message (Collapse) | Author | Age | Files | Lines | |
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| * | simd: fix typos | Laytan Laats | 2026-01-11 | 1 | -2/+2 |
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| * | Add `@(require_results)` to `core:simd` procedures where missing | gingerBill | 2025-11-22 | 1 | -0/+8 |
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| * | Fix renamed function call in bit_not | andzdroid | 2025-10-10 | 1 | -1/+1 |
| | | | | | xor was renamed to bit_xor | ||||
| * | Further overhaul of package line comments. | Jeroen van Rijn | 2025-10-09 | 1 | -1/+1 |
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| * | More package lines. | Jeroen van Rijn | 2025-10-09 | 1 | -1/+1 |
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| * | Make `Operation:` comments unformatted | gingerBill | 2025-10-09 | 1 | -54/+54 |
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| * | rename table_lookup to runtime_swizzle | Jon Lipstate | 2025-07-16 | 1 | -3/+3 |
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| * | table lookup intrinsic | Jon Lipstate | 2025-07-05 | 1 | -0/+51 |
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| * | Rename `SIMD_IS_EMULATED` to capability-affirmative `HAS_HARDWARE_SIMD` | Feoramund | 2025-05-29 | 1 | -4/+4 |
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| * | Move `simd.IS_EMULATED` to `runtime.SIMD_IS_EMULATED` | Feoramund | 2025-05-29 | 1 | -5/+2 |
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| * | Added alternate reduce-add/reduce-mul intrinsics. | Barinzaya | 2025-05-05 | 1 | -2/+192 |
| | | | | | | | | | | | The new reduce_add/reduce_mul procs perform the corresponding arithmetic reduction in different orders than sequential order. These alternative orders can often offer better SIMD hardware utilization. Two different orders are added: pair-wise (operating on pairs of adjacent elements) or bisection-wise (operating element-wise on the first and last N/2 elements of the vector). | ||||
| * | Add `simd.indices` and docs | gingerBill | 2025-05-05 | 1 | -0/+14 |
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| * | Fix broken examples in documentation tester. | Jeroen van Rijn | 2025-04-05 | 1 | -55/+113 |
| | | | | | | | | | | No more: ``` We could not find the procedure "pkg_foo_example :: proc()" needed to test the example created for "pkg.foo" The following procedures were found: bar() ``` | ||||
| * | Fix documentation for simd_shuffle | flysand7 | 2025-03-02 | 1 | -5/+3 |
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| * | Merge branch 'master' into docs-simd | flysand7 | 2025-03-02 | 1 | -0/+78 |
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| | * | Added simd_extract_lsbs intrinsic as well. | Barinzaya | 2025-02-24 | 1 | -0/+1 |
| | | | | | | | | | | | Equivalent to the simd_extract_msbs intrinsic, except it extracts the least significant bit of each element instead. | ||||
| | * | Added simd_extract_msbs intrinsic. | Barinzaya | 2025-02-24 | 1 | -0/+2 |
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| * | | Merge branch 'simd-docs' into docs-simd | flysand7 | 2025-01-21 | 1 | -86/+90 |
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| | * | | Suggestion fixes | flysand7 | 2025-01-21 | 1 | -64/+75 |
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| | * | | Fix indentation | flysand7 | 2024-12-01 | 1 | -6/+6 |
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| | * | | Fix indentation | flysand7 | 2024-12-01 | 1 | -1/+1 |
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| | * | | First pass | flysand7 | 2024-12-01 | 1 | -36/+2190 |
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| * | | [simd] Fixes to inputs/result/example/output sections & grmamar fixes | flysand7 | 2025-01-08 | 1 | -97/+110 |
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| * | | Apply suggestions from code review | flysand7 | 2024-12-04 | 1 | -4/+4 |
| | | | | | | | Co-authored-by: Laytan <laytanlaats@hotmail.com> | ||||
| * | | Apply suggestions from code review | flysand7 | 2024-12-04 | 1 | -105/+105 |
| | | | | | | | Co-authored-by: Laytan <laytanlaats@hotmail.com> | ||||
| * | | [core/simd]: Write package documentation | flysand7 | 2024-12-02 | 1 | -36/+2190 |
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| * | add riscv to simd.IS_EMULATED | Laytan Laats | 2024-08-22 | 1 | -0/+1 |
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| * | core/simd: Add `IS_EMULTATED` so there is one place to look for potatos | Yawning Angel | 2024-08-18 | 1 | -0/+7 |
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| * | Add `intrinsics.masked_expand_load` and `intrinsics.masked_compress_store` | gingerBill | 2024-08-05 | 1 | -1/+2 |
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| * | Fix typos | gingerBill | 2024-08-05 | 1 | -2/+2 |
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| * | Add `intrinsics.simd_masked_load` and `intrinsics.simd_masked_store` | gingerBill | 2024-08-05 | 1 | -0/+3 |
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| * | Add `intrinsics.simd_gather` and ``intrinsics.simd_scatter` | gingerBill | 2024-08-05 | 1 | -0/+5 |
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| * | Rename `add_sat` -> `saturating_add` | gingerBill | 2024-08-05 | 1 | -2/+2 |
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| * | Add `simd_reduce_any` and `simd_reduce_all` | gingerBill | 2024-08-05 | 1 | -0/+3 |
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| * | Replace `core:*` to `base:*` where appropriate | gingerBill | 2024-01-28 | 1 | -2/+2 |
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| * | Rename simd bitwise operations from `intrinsics.simd_and` to ↵ | gingerBill | 2023-09-28 | 1 | -4/+4 |
| | | | | | `intrinsics.simd_bit_and` etc | ||||
| * | Remove `simd_rem`; Disallow `simd_div` for integers | gingerBill | 2022-06-02 | 1 | -2/+1 |
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| * | Rename to `lanes_rotate_left`, `lanes_rotate_right`, `lanes_reverse` | gingerBill | 2022-05-29 | 1 | -3/+3 |
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| * | Add loads of aliases of vector types | gingerBill | 2022-05-27 | 1 | -18/+53 |
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| * | Add prefix of `lanes_` | gingerBill | 2022-05-26 | 1 | -2/+2 |
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| * | Support reverse_bits for #simd | gingerBill | 2022-05-26 | 1 | -1/+2 |
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| * | Merge `intrinsics.simd_sqrt` with `intrinsics.sqrt` | gingerBill | 2022-05-26 | 1 | -1/+1 |
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| * | Add `intrinsics.fused_mul_add` | gingerBill | 2022-05-26 | 1 | -0/+3 |
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| * | Support `count_ones` etc with #simd | gingerBill | 2022-05-26 | 1 | -5/+10 |
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| * | Rename `simd_eq` etc to `simd_lanes_eq` | gingerBill | 2022-05-26 | 1 | -6/+6 |
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| * | Add arithmetic operator support for simd vectors; Add `intrinsics.simd_and_not` | gingerBill | 2022-05-26 | 1 | -3/+13 |
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| * | Remove need for `simd.splat` | gingerBill | 2022-05-26 | 1 | -7/+2 |
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| * | Keep -vet happy | gingerBill | 2022-05-26 | 1 | -1/+1 |
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| * | `simd.bit_not`; `simd.copysign` | gingerBill | 2022-05-26 | 1 | -1/+15 |
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| * | Add `simd_clamp` | gingerBill | 2022-05-26 | 1 | -3/+5 |
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